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Design For Test
DFT architecture, implementation, verification, pattern generation
Post silicon test bring-up, fault diagnosis, yield ramp
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Post-silicon design validation and characterization
Design validation planning, Equipment selection, Hardware and software development
Validation, correlation and characterization
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ATE Test Engineering
Test planning, Hardware and test program development, release to production
Cost optimization, yield improvement, factory efficiency improvement
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PCB Design Engineering
Schematics, layout, BOM Management
EVM Designs, ATE Hardware designs, System module designs
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Product Breadth
Tools and Technology
Cadence
Mentor Graphics
Synopsys
Logic – Scan and BIST
Fault models
Memory BIST
High speed DFT
Analog DFT
Diagnosis - yield ramp
Test bring-up
Test stability and performance
System test support
DFT – RTL level
DFT architecture
DFT specification
DFT RTL development
DFT RTL verification
Scan insertion
Coverage analysis
DFT – Gate level
DFT timing constraints
Gate level simulations
Test power and IR analysis
Test Pattern Handoff
Fault models
Stuck-at
Transition
Path delay
Iddq
Cell-aware
Small delay
Memory BIST
Mixed-signal tests
Embedded IP
Post Silicon Support
Test Bring-up
Root cause failures
Desktop testers
Defect diagnosis with scan
Analyze test escapes
Tools and Technology
LabVIEW
TestStand
PXI Technology
C, C++
Python
Visual basic
Custom Tools
Design Validation Planning
Solution architecture
Test plan
Equipment needs
Software planning
Hardware Design
EVM Modules
Bench Modules
System modules
Schematics, Layout, BOM
Fab and Assembly
Software Development
Instrument drivers
I2C/SPI interface drivers
Test Modules
Test Suite
Automation Infrastructure
EVM GUI Development
Reliability Test Automation
Protocol Analyzer
Memory Tester
Prober Automation
Validation and Reporting
Silicon Bring-up
Characterization
Correlation
Reporting
Tools and Technology
Advantest 93K
Advantest T2K
NI STS
Teradyne Eagle
Teradyne FLEX
Teradyne J750
LTXC Fusion
LTXC Diamond
New Product Test Solution
Test Plan
Hardware
Test Program
Characterization
Qualification
Yield Improvement
Release to Production
Probe Development
Probe card development
Yield improvement
Release to Production
Conversions
Platforms and multi-site
Cost reduction
Throughput improvement
Capacity improvement
Catalog re-purposing
Re-qualify devices for:
Automotive
Medical
Hi-Reliability
Quality improvement
Coverage improvement
Release to production
Tools and Technology
Tools
Altium
Cadence
Mentor
Technology
Analog
Mixed signal
RF
Digital
High-speed
High voltage
High current
PCB Design Services
Schematics
Layout
BOM Management
Component creation
Library maintenance
Fab, Assembly and Test
PCB Design Spectrum
EVM Designs
ATE Hardware Designs
System modules
Domains
Automotive
Infotainment
Vision
Safety
Aerospace
Wireless
IOT and Automation
Industrial
Home
Multi-media
Consumer
Medical
Energy
